- 专利标题: Semiconductor memory device having memory cell section and peripheral circuit section and method of manufacturing the same
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申请号: US11283742申请日: 2005-11-22
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公开(公告)号: US20060071293A1公开(公告)日: 2006-04-06
- 发明人: Masayuki Ichige , Riichiro Shirota , Yuji Takeuchi , Kikuko Sugimae
- 申请人: Masayuki Ichige , Riichiro Shirota , Yuji Takeuchi , Kikuko Sugimae
- 优先权: JP2000-301309 20000929; JP2000-301380 20000929
- 主分类号: H01L29/00
- IPC分类号: H01L29/00
摘要:
An element isolating region for separating an element region of a semiconductor layer is formed in a peripheral circuit section of a semiconductor memory device, and a first conductive layer is formed with the element region with a first insulating film interposed therebetween. A second conductive layer is formed on the first conductive layer to extend into the element isolating region. A surface of that section of the second conductive layer which is positioned within the element isolating region is exposed, and a third conductive layer is formed on the second conductive layer with a second insulating film interposed therebetween. Further, a contact is electrically connected to an exposed surface of the second conductive layer.
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