- 专利标题: System and method to reduce jitter
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申请号: US10968735申请日: 2004-10-19
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公开(公告)号: US20060083341A1公开(公告)日: 2006-04-20
- 发明人: Samuel Naffziger , Steven Liepe
- 申请人: Samuel Naffziger , Steven Liepe
- 专利权人: P-cards
- 当前专利权人: P-cards
- 主分类号: H04L7/00
- IPC分类号: H04L7/00
摘要:
One disclosed embodiment may comprise an interpolation system that includes an interpolator that interpolates between a selected phase from a preceding cycle and a selected phase from a current cycle to provide an interpolated phase for the current cycle. An edge of the interpolated phase for the current cycle has reduced jitter relative to an edge of a corresponding phase of the current cycle. A delay system delays a plurality of other phases of the current cycle to provide delayed other phases, the delayed other phases and the interpolated phase for the current cycle collectively defining a set of adjusted phases for the current cycle.
公开/授权文献
- US07599458B2 System and method to reduce jitter 公开/授权日:2009-10-06