Invention Application
- Patent Title: Transistor with strain-inducing structure in channel
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Application No.: US11292428Application Date: 2005-12-01
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Publication No.: US20060084216A1Publication Date: 2006-04-20
- Inventor: Stephen Cea , Ravindra Soman , Ramune Nagisetty , Sunit Tyagi , Sanjay Natarajan
- Applicant: Stephen Cea , Ravindra Soman , Ramune Nagisetty , Sunit Tyagi , Sanjay Natarajan
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
Various methods for forming a layer of strained silicon in a channel region of a device and devices constructed according to the disclosed methods. In one embodiment, a strain-inducing layer is formed, a relaxed layer is formed on the strain-inducing layer, a portion of the strain-inducing layer is removed, which allows the strain-inducing layer to relax and strain the relaxed layer.
Public/Granted literature
- US07473591B2 Transistor with strain-inducing structure in channel Public/Granted day:2009-01-06
Information query
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