Invention Application
- Patent Title: Integrated thin film capacitor/inductor/interconnect system and method
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Application No.: US11284704Application Date: 2005-11-21
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Publication No.: US20060097344A1Publication Date: 2006-05-11
- Inventor: Michael Casper , William Mraz
- Applicant: Michael Casper , William Mraz
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L23/52

Abstract:
A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).
Public/Granted literature
- US07446388B2 Integrated thin film capacitor/inductor/interconnect system and method Public/Granted day:2008-11-04
Information query
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