发明申请
US20060123274A1 Method and apparatus for detecting timing exception path and computer product
有权
用于检测定时异常路径和计算机产品的方法和装置
- 专利标题： Method and apparatus for detecting timing exception path and computer product
- 专利标题（中）： 用于检测定时异常路径和计算机产品的方法和装置
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申请号： US11063773申请日： 2005-02-24
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公开(公告)号： US20060123274A1公开(公告)日： 2006-06-08
- 发明人: Hiroyuki Higuchi
- 申请人： Hiroyuki Higuchi
- 申请人地址： JP Kawasaki
- 专利权人： FUJITSU LIMITED
- 当前专利权人： FUJITSU LIMITED
- 当前专利权人地址： JP Kawasaki
- 优先权： JP2004-337832 20041122
- 主分类号： G11B20/20
- IPC分类号： G11B20/20 ; G06K5/04 ; G11B5/00
摘要：
A selector selects an FF pair (FFs, FFe) in circuit information, a calculator calculates value-capturing condition data at FFe, a divider divides a path set that matches the value-capturing condition data from a set of paths between the FF pair (FFs, FFe), and a multi-cycle path detector determines whether all the paths in the path set are multi-cycle paths. When the path set is a multi-cycle path, it is added to a timing exception path list that is output by an output unit.