The invention relates to a circuit arrangement for switching high-voltage signals with low-voltage signals, particularly for driving a semiconductor memory arrangement, comprising a low-voltage logic device for generating a low-voltage signal with a first predetermined logic level and with a second predetermined logic level, comprising a latch for receiving and latching the low-voltage signal and for outputting an output signal with a voltage dependent on the logic level of the received low-voltage signal, comprising a level shifter for increasing the value of the voltage of the latched low-voltage signal to a voltage of a high-voltage signal, as a result of which the voltage of the output signal output essentially rises to the voltage of the high-voltage signal, the latch exhibiting one or more high-voltage transistors.