发明申请
- 专利标题: Circuit simulation method and circuit simulation apparatus
- 专利标题(中): 电路仿真方法及电路仿真装置
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申请号: US11313994申请日: 2005-12-22
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公开(公告)号: US20060142987A1公开(公告)日: 2006-06-29
- 发明人: Tomoyuki Ishizu , Takuya Umeda , Katsuhiro Ootani , Yasuyuki Sahara
- 申请人: Tomoyuki Ishizu , Takuya Umeda , Katsuhiro Ootani , Yasuyuki Sahara
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 优先权: JPP2004-374205 20041224
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A circuit simulation apparatus and a modeling method are provided which are useful to design an integrated circuit in a very fine manner by forming a model of such a transistor that widths of element isolating-purpose insulating films are different from each other. In an isolation width depending parameter correcting means 4 of the present invention, an approximate expression of a parameter having an element isolating-purpose insulating film width depending characteristic is formed, and a value of a corrected parameter obtained by employing the formed approximate expression is replaced by a value of an original parameter, so that a transistor model of such a transistor is formed in which element isolating-purpose insulating film widths are different from each other. As a consequence, circuit simulation can be carried out in high precision by considering a change in transistor characteristics caused by a stress, which are approximated to actually measured data.
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