A system, method, and apparatus for interchip communication between an extended serial peripheral interface (EPSI) master (210) chip having clocking capability and an EPSI slave (310) chip is disclosed. The method comprises the master chip selecting a slave chip (402), the master clocking data into the slave chip from the master chip and at the same time clocking data from the slave chip into the master chip (404), and processing the clocked in data to negotiate further data transfer (406) between the master chip and the slave chip. Selection of a slave chip by the master chip may also take place in response to an interrupt received by the master chip from the slave chip (502), with the master then clocking data in both directions (504) to negotiate further data transfer (506) between the master chip and the slave chip.