A logic analyzer data processing method used in a logic analyzer (10) having a control circuit (17) adapted to read in test data from a test sample (13), a memory (18) controlled by the control circuit (17) to store the test data received from the test sample (13), and a display (161) adapted to display the test data fetched by the control circuit (17) from the memory (18), the method including the step of enabling the control circuit (17) to drive a compressor (19) to compress the test data received from the test sample (13) before storing it in the memory (18), and to depress the compressed test data before transmitting it from the memory (18) to the display (161).