- 专利标题: Memory system and data writing method
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申请号: US11193433申请日: 2005-08-01
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公开(公告)号: US20060171202A1公开(公告)日: 2006-08-03
- 发明人: Kazuya Kawamoto , Yoshiyuki Tanaka , Hiroshi Sukegawa
- 申请人: Kazuya Kawamoto , Yoshiyuki Tanaka , Hiroshi Sukegawa
- 优先权: JP2004-225026 20040802
- 主分类号: G11C16/04
- IPC分类号: G11C16/04
摘要:
A data writing method is disclosed. In a memory system comprising a NAND flash memory and a controller which controls the memory, the memory system storing data provided from a host to the NAND flash memory, the data writing method comprises a steps of specifying a column address in which a column failure which has occurred in the NAND flash memory by the controller, and a step of, during writing into the NAND flash memory, writing data of a first logic level into a memory cell which corresponds to the specified column address regardless of write data provided from the controller.
公开/授权文献
- US07376012B2 Memory system and data writing method 公开/授权日:2008-05-20
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