发明申请
摘要:
A memory device capable of reducing power consumption when the operation mode is a deep power down mode, includes an external power source voltage line through which an external power source voltage is supplied; an internal voltage line through which an internal voltage generated in an internal voltage generator is supplied; a ground voltage line through which a ground voltage is supplied; and an internal circuit selectively connected to one of the external power source voltage line, the internal voltage line and the ground line according to the operation modes of the memory device, to use one of the external power source voltage, the internal voltage and the ground voltage as a power source based on the selective connection of the lines.
公开/授权文献
- US07184354B2 Memory device reduced power consumption in power down mode 公开/授权日:2007-02-27
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