- 专利标题: Self-bypassing voltage level translator circuit
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申请号: US11065785申请日: 2005-02-25
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公开(公告)号: US20060192587A1公开(公告)日: 2006-08-31
- 发明人: Dipankar Bhattacharya , Makeshwar Kothandaraman , John Kriz , Bernard Morris , Yehuda Smooha
- 申请人: Dipankar Bhattacharya , Makeshwar Kothandaraman , John Kriz , Bernard Morris , Yehuda Smooha
- 主分类号: H03K19/0175
- IPC分类号: H03K19/0175
摘要:
A voltage level translator circuit is selectively operable in one of at least two modes in response to a control signal. In a first mode, the voltage level translator circuit is operative to translate an input signal referenced to a first source providing a first voltage to an output signal referenced to a second source providing a second voltage. In a second mode, the voltage level translator circuit is operative to provide a signal path from an input of the voltage translator circuit to an output thereof without translating the input signal. The control signal is indicative of a difference between the first voltage and the second voltage.
公开/授权文献
- US07145364B2 Self-bypassing voltage level translator circuit 公开/授权日:2006-12-05