发明申请
- 专利标题: Control circuit and control method
- 专利标题(中): 控制电路及控制方法
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申请号: US11068862申请日: 2005-03-02
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公开(公告)号: US20060200631A1公开(公告)日: 2006-09-07
- 发明人: Seiji Seki , Toshihisa Kamemaru , Hiroyasu Negishi , Junko Kobara
- 申请人: Seiji Seki , Toshihisa Kamemaru , Hiroyasu Negishi , Junko Kobara
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 主分类号: G06F13/28
- IPC分类号: G06F13/28
摘要:
The present invention aims to prefetch data which is stored in a cache memory and whose probability of access is high by replacing data whose probability of access is low. On discriminating a cache miss of target data which is used for an operation process performed by an operation processing unit, a cache hit discriminating unit obtains the target data from a main memory. Further, when the cache hit discriminating unit discriminates a cache hit, an invalid data discriminating unit discriminates a cache line including the target data is the same as the one including data which has been used for the previous operation process. Then, when the invalid data discriminating unit discriminates the cache line including the target data is different from the cache line including the data used for the previous operation process, a prefetch controlling unit prefetches the data by replacing data stored in the main memory with the cache line including the data used for the previous operation process.
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