发明申请
- 专利标题: SIMPLIFIED BURIED PLATE STRUCTURE AND PROCESS FOR SEMICONDUCTOR-ON-INSULATOR CHIP
- 专利标题(中): 半导体绝缘子芯片的简化平板结构和工艺
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申请号: US10906808申请日: 2005-03-08
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公开(公告)号: US20060202249A1公开(公告)日: 2006-09-14
- 发明人: Kangguo Cheng , Ramachandra Divakaruni , Herbert Ho , Carl Radens
- 申请人: Kangguo Cheng , Ramachandra Divakaruni , Herbert Ho , Carl Radens
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L29/94
- IPC分类号: H01L29/94
摘要:
A structure is provided herein which includes an array of trench capacitors having at least portions disposed below a buried oxide layer of an SOI substrate. Each trench capacitor shares a common unitary buried capacitor plate which includes at least a portion of a first unitary semiconductor region disposed below the buried oxide layer. An upper boundary of the buried capacitor plate defines a plane parallel to a major surface of the substrate which extends laterally throughout the array of trench capacitors. In a particular embodiment, which starts from either an SOI or a bulk substrate, trenches of the array and a contact hole are formed simultaneously, such that the contact hole extends to substantially the same depth as the trenches. The contact hole preferably has substantially greater width than the trenches such that the conductive contact via can be formed simultaneously by processing used to form trench capacitors extending along walls of the trenches.
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