Invention Application
US20060202332A1 Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package
审中-公开
半导体芯片封装装置及半导体芯片封装的制造方法
- Patent Title: Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package
- Patent Title (中): 半导体芯片封装装置及半导体芯片封装的制造方法
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Application No.: US11418010Application Date: 2006-05-05
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Publication No.: US20060202332A1Publication Date: 2006-09-14
- Inventor: Se-Young Jeong , Gi-Young Sohn , Ki-Kwon Jeong , Hyeon Hwang
- Applicant: Se-Young Jeong , Gi-Young Sohn , Ki-Kwon Jeong , Hyeon Hwang
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Priority: KR10-2005-0001950 20050108; KR10-2005-0074916 20050816
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus includes a plating unit that is disposed in a direction to form a conductive plating layer on external terminals of the semiconductor chip package; and a reflow unit that is disposed with the plating unit to melt the conductive plating layer. The packaging apparatus may further include a rinsing unit that is disposed with the plating unit to clean and cool the conductive plating layer. Thus, it is possible to effectively suppress the growth of whiskers on the plating layer of the external terminals, and to secure economical efficiency, reducing costs, and allowing mass production.
Information query
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