发明申请
- 专利标题: E-Fuse and anti-E-Fuse device structures and methods
- 专利标题(中): 电子熔断器和反电子保险丝器件的结构和方法
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申请号: US11440199申请日: 2006-05-24
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公开(公告)号: US20060220174A1公开(公告)日: 2006-10-05
- 发明人: Jeffrey Brown , Robert Gauthier , Jed Rankin , William Tonti
- 申请人: Jeffrey Brown , Robert Gauthier , Jed Rankin , William Tonti
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L29/00
- IPC分类号: H01L29/00
摘要:
Standard photolithography is used to pattern and fabricate a final polysilicon wafer imaged structure which is smaller than normal allowable photo-lithographic minimum dimensions. Three different methods are provided to produce such sub-minimum dimension structures, a first method uses a photolithographic mask with a sub-minimum space between minimum size pattern features of the mask, a second method uses a photolithographic mask with a sub-minimum widthwise jog or offset between minimum size pattern features of the mask, and a third method is a combination of the first and second methods. Each of the three methods can be used with three different embodiments, a first embodiment is a polysilicon E-Fuse with a sub-minimum width polysilicon fuse line, a second embodiment is a work function altered/programmed self-aligned MOSFET E-Fuse with a sub-minimum width fuse line, and a third embodiment is a polysilicon MOSFET E-Fuse with a sub-minimum width fuse line which is programmed with a low trigger voltage snapback.
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