发明申请
- 专利标题： Sample-hold circuit and semiconductor device
- 专利标题（中）： 采样保持电路和半导体器件
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申请号： US11390344申请日： 2006-03-28
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公开(公告)号： US20060220692A1公开(公告)日： 2006-10-05
- 发明人: Hiroyuki Hirashima
- 申请人： Hiroyuki Hirashima
- 专利权人： Sharp Kabushiki Kaisha
- 当前专利权人： Sharp Kabushiki Kaisha
- 优先权： JPP2005-094708 20050329
- 主分类号： G11C27/02
- IPC分类号： G11C27/02 ; H03K5/00
摘要：
A first sampling capacitor 3 is connected between an output terminal of a first analog switch 1 and the ground, and an input terminal of a second analog switch 2 is connected to a node between the first analog switch 1 and the first sampling capacitor 3. A second sampling capacitor 4 is connected between an output terminal of the first analog switch 1 and the ground. A control part turning on the first and second analog switches 1 and 2 in a state in which an input voltage is applied to the input terminal of the first analog switch 1, thereafter turns off the second analog switch 2, subsequently turns off the first analog switch 1 and subsequently turns on the second analog switch 2.