- 专利标题: Edge calibration for synchronous data transfer between clock domains
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申请号: US11118740申请日: 2005-04-29
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公开(公告)号: US20060244642A1公开(公告)日: 2006-11-02
- 发明人: Timothy Fischer , Samuel Naffziger , Benjamin Patella
- 申请人: Timothy Fischer , Samuel Naffziger , Benjamin Patella
- 主分类号: H03M1/10
- IPC分类号: H03M1/10
摘要:
Systems and methods of edge calibration for synchronous data transfer between clock domains are disclosed. An exemplary method may comprise comparing a drive clock signal to a receive clock signal, generating a select clock signal, and configuring a data path based a least in part on the select clock signal for synchronous data transfer between clock domains so that data arrives in an early clock domain at the desired logical clock cycle.