发明申请
US20060248390A1 Test program debugger device, semiconductor test apparatus, test program debugging method and test method
失效
测试程序调试器，半导体测试仪，测试程序调试方法及测试方法
- 专利标题： Test program debugger device, semiconductor test apparatus, test program debugging method and test method
- 专利标题（中）： 测试程序调试器，半导体测试仪，测试程序调试方法及测试方法
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申请号： US11211162申请日： 2005-08-24
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公开(公告)号： US20060248390A1公开(公告)日： 2006-11-02
- 发明人: Mitsuo Hori , Hideki Tada , Takahiro Kataoka , Hiroyuki Sekiguchi , Kazuo Mukawa
- 申请人： Mitsuo Hori , Hideki Tada , Takahiro Kataoka , Hiroyuki Sekiguchi , Kazuo Mukawa
- 申请人地址： JP Tokyo
- 专利权人： Advantest Corporation
- 当前专利权人： Advantest Corporation
- 当前专利权人地址： JP Tokyo
- 优先权： JP2003-348617 20031007
- 主分类号： G06F11/00
- IPC分类号： G06F11/00
摘要：
A test program debugging apparatus of the present invention includes a device under test simulator and a semiconductor testing apparatus simulator. Further, the semiconductor testing apparatus simulator includes: a verification range acquiring unit that acquires a verification range that is a range of commands to be verified among commands included in the test program; a command simplifying unit that simplifies non-setting commands other than setting commands for setting the device under test simulator, among non-verification range commands included in a non-verification range that is a range other than the verification range within the test program; and a command executing unit that executes the verification range commands included in the verification range, the setting commands, and the non-setting commands simplified by the command simplifying unit.
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