发明申请
- 专利标题： Method, apparatus, and program to efficiently calculate cache prefetching patterns for loops
- 专利标题（中）： 用于循环的高速缓存预取模式的方法，装置和程序
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申请号： US11120915申请日： 2005-05-03
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公开(公告)号： US20060253656A1公开(公告)日： 2006-11-09
- 发明人: Christopher Donawa , Allan Kielstra
- 申请人： Christopher Donawa , Allan Kielstra
- 主分类号： G06F13/28
- IPC分类号： G06F13/28
摘要：
A mechanism is provided that identifies instructions that access storage and may be candidates for catch prefetching. The mechanism augments these instructions so that any given instance of the instruction operates in one of four modes, namely normal, unexecuted, data gathering, and validation. In the normal mode, the instruction merely performs the function specified in the software runtime environment. An instruction in unexecuted mode, upon the next execution, is placed in data gathering mode. When an instruction in the data gathering mode is encountered, the mechanism of the present invention collects data to discover potential fixed storage access patterns. When an instruction is in validation mode, the mechanism of the present invention validates the presumed fixed storage access patterns.
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