发明申请
- 专利标题： Fault Tolerant Computer System
- 专利标题（中）： 容错计算机系统
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申请号： US11382133申请日： 2006-05-08
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公开(公告)号： US20060253727A1公开(公告)日： 2006-11-09
- 发明人: Paul Leveille , Satoshi Watanabe , Keiichi Koyama
- 申请人： Paul Leveille , Satoshi Watanabe , Keiichi Koyama
- 申请人地址： US MA Boxborough 01719
- 专利权人： Marathon Technologies Corporation
- 当前专利权人： Marathon Technologies Corporation
- 当前专利权人地址： US MA Boxborough 01719
- 主分类号： G06F11/00
- IPC分类号： G06F11/00
摘要：
A fault-tolerant computer system includes at least two servers, each of which is configured to perform a first set of operations. Each of the two servers communicate with a computer that does not perform the first set of operations. In the event of a failure of a component of the system, determining which of the servers will continue to perform the first set of operations based on communication with the computer.
公开/授权文献
- US07373545B2 Fault tolerant computer system 公开/授权日：2008-05-13
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