发明申请
- 专利标题: Semiconductor device
- 专利标题(中): 半导体器件
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申请号: US11370038申请日: 2006-03-08
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公开(公告)号: US20060255406A1公开(公告)日: 2006-11-16
- 发明人: Hisao Ichijo , Hiroyoshi Ogura , Yoshinobu Sato , Teruhisa Ikuta , Toru Terashita
- 申请人: Hisao Ichijo , Hiroyoshi Ogura , Yoshinobu Sato , Teruhisa Ikuta , Toru Terashita
- 申请人地址: JP Osaka
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: JP Osaka
- 优先权: JP2005-142232 20050516
- 主分类号: H01L27/12
- IPC分类号: H01L27/12
摘要:
An object of the present invention is to provide a semiconductor device which enables to reduce the device area, while securing the breakdown voltage between the drain and the source of each MOS transistor for the semiconductor device including plural MOS transistors, which are arrayed adjacently each other, with different types of channel conductivity. The semiconductor device includes a semiconductor substrate, a buried oxide film and a semiconductor layer, and furthermore the semiconductor layer has an island-like semiconductor layer, in which a MOS transistor is formed, the MOS transistor has a source region, and a drain region that is positioned in the periphery of the source region, an island-like semiconductor layer, in which a MOS transistor is formed, the MOS transistor has a drain region, and a source region is that is positioned in the periphery of the drain region, an isolation trench which isolates the former island-like semiconductor layer from other portions of the semiconductor layer, an isolation trench which isolates the latter island-like semiconductor layer from other portions of the semiconductor layer, and a buffer region, in which the electric potential is fixed to the lowest electric potential in a circuit, which prevents an electrical interference occurred between transistors.
公开/授权文献
- US07342283B2 Semiconductor device 公开/授权日:2008-03-11
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