发明申请
- 专利标题: MULTILAYER WIRING BOARD AND FABRICATING METHOD OF THE SAME
- 专利标题(中): 多层接线板及其制作方法
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申请号: US11458178申请日: 2006-07-18
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公开(公告)号: US20060274510A1公开(公告)日: 2006-12-07
- 发明人: Masakazu Nakada , Minoru Ogawa
- 申请人: Masakazu Nakada , Minoru Ogawa
- 优先权: JPP2005-212570 20050722; JPP2004-325259 20041109
- 主分类号: H05K7/00
- IPC分类号: H05K7/00 ; H01R43/00
摘要:
To improve reliability of interlayer connection of a multilayer wiring board. Plural metal conductor pattern layers are formed on a base material made of thermoplastic resin. Then, high melting metal containing copper, low melting metal containing tin, and binder resin are packed into a via hole. Subsequently, predetermined heat and pressure are applied. Then, while half-melted metal mixture droplets of the low and high melting metals and melted binder resin are phase separated from each other, the surfaces of the conductor patterns that face the openings of the via and the low melting metal are alloyed with each other to form an alloy layer as well as the high and low meting metals are alloyed with each other to form a columnar-shaped interlayer connection part. As a result, an intermediate layer is formed between the outer surface of the columnar-shaped interlayer connection part and inner surface of the via hole.
公开/授权文献
- US07642468B2 Multilayer wiring board and fabricating method of the same 公开/授权日:2010-01-05