发明申请
US20060274510A1 MULTILAYER WIRING BOARD AND FABRICATING METHOD OF THE SAME 失效
多层接线板及其制作方法

  • 专利标题: MULTILAYER WIRING BOARD AND FABRICATING METHOD OF THE SAME
  • 专利标题(中): 多层接线板及其制作方法
  • 申请号: US11458178
    申请日: 2006-07-18
  • 公开(公告)号: US20060274510A1
    公开(公告)日: 2006-12-07
  • 发明人: Masakazu NakadaMinoru Ogawa
  • 申请人: Masakazu NakadaMinoru Ogawa
  • 优先权: JPP2005-212570 20050722; JPP2004-325259 20041109
  • 主分类号: H05K7/00
  • IPC分类号: H05K7/00 H01R43/00
MULTILAYER WIRING BOARD AND FABRICATING METHOD OF THE SAME
摘要:
To improve reliability of interlayer connection of a multilayer wiring board. Plural metal conductor pattern layers are formed on a base material made of thermoplastic resin. Then, high melting metal containing copper, low melting metal containing tin, and binder resin are packed into a via hole. Subsequently, predetermined heat and pressure are applied. Then, while half-melted metal mixture droplets of the low and high melting metals and melted binder resin are phase separated from each other, the surfaces of the conductor patterns that face the openings of the via and the low melting metal are alloyed with each other to form an alloy layer as well as the high and low meting metals are alloyed with each other to form a columnar-shaped interlayer connection part. As a result, an intermediate layer is formed between the outer surface of the columnar-shaped interlayer connection part and inner surface of the via hole.
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