发明申请
US20070019058A1 Lithography simulation method, mask pattern preparation method, semiconductor device manufacturing method and recording medium 失效
光刻模拟法,掩模图案制备方法,半导体器件制造方法和记录介质

  • 专利标题: Lithography simulation method, mask pattern preparation method, semiconductor device manufacturing method and recording medium
  • 专利标题(中): 光刻模拟法,掩模图案制备方法,半导体器件制造方法和记录介质
  • 申请号: US11485554
    申请日: 2006-07-13
  • 公开(公告)号: US20070019058A1
    公开(公告)日: 2007-01-25
  • 发明人: Toshiya KotaniShigeki NojimaShoji Mimotogi
  • 申请人: Toshiya KotaniShigeki NojimaShoji Mimotogi
  • 优先权: JP2005-204146 20050713
  • 主分类号: B41J2/385
  • IPC分类号: B41J2/385
Lithography simulation method, mask pattern preparation method, semiconductor device manufacturing method and recording medium
摘要:
A lithography simulation method includes: taking in design data of a pattern to be formed on a substrate and mask data to prepare a mask pattern used in forming a latent image of the pattern on the substrate by transmission of an energy ray; obtaining the latent image of the pattern by calculation of an intensity of the energy ray; locally changing, at least in a portion corresponding to a pattern to be interested, a relative position in a direction of the intensity of the energy ray between a latent image curve and a reference intensity line in accordance with a distance between the pattern to be interested and a pattern of a neighboring region, the latent image curve being an intensity distribution curve of the energy ray constituting the latent image, the reference intensity line being defined to specify a position of an edge of the pattern to be interested; and calculating a distance between intersections of a portion of the latent image curve corresponding to the pattern to be interested and the reference intensity line in the changed relative position to define an interested line width of the pattern to be interested.
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