In an embodiment, a semiconductor device includes a semiconductor substrate having an active region and a field region in contact with the active region. A trench isolation layer is formed within the semiconductor substrate of the field region to define the active region, and has a protrusion higher than a surface of the semiconductor substrate. A gate pattern is formed on and across the semiconductor substrate of the active region, and has a top surface disposed on substantially the same plane as a top surface of the trench isolation layer. A gate line is formed, which is self-aligned with the gate pattern to cover the gate pattern and extends over the trench isolation layer. A reduction in an effective channel length of the device due to excess trapped electrons is prevented.