发明申请
- 专利标题: Memory
- 专利标题(中): 记忆
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申请号: US11494748申请日: 2006-07-28
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公开(公告)号: US20070025172A1公开(公告)日: 2007-02-01
- 发明人: Hideaki Miyamoto , Shigeharu Matsushita
- 申请人: Hideaki Miyamoto , Shigeharu Matsushita
- 专利权人: SANYO ELECTRIC CO., LTD.
- 当前专利权人: SANYO ELECTRIC CO., LTD.
- 优先权: JPJP2005-219072 20050728; JPJP2005-364769 20051219
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
A memory allowing reduction of the period of an external access operation is provided. This memory comprises an access control portion performing an internal access operation on the basis of an external access operation, a refresh control portion performing a refresh operation and a refresh division control portion dividing the refresh operation into a read operation RFRD and rewrite operations RFRS1 and RFRS2. The memory performs the read operation RFRD and the rewrite operations RFRS1 and RFRS2 at least either before or after different internal access operations corresponding to different external access operations respectively.
公开/授权文献
- US07362642B2 Memory 公开/授权日:2008-04-22
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