发明申请
- 专利标题： Method of forming gate electrode structures
- 专利标题（中）： 形成栅电极结构的方法
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申请号： US11201042申请日： 2005-08-10
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公开(公告)号： US20070037371A1公开(公告)日： 2007-02-15
- 发明人: Zhigang Wang , Nian Yang , Shenqing Fang
- 申请人： Zhigang Wang , Nian Yang , Shenqing Fang
- 主分类号： H01L21/3205
- IPC分类号： H01L21/3205
摘要：
In one example, the method includes forming a patterned hard mask feature above a layer of gate electrode material, the hard mask feature having a photoresist feature formed thereabove and the hard mask feature having a critical dimension. The method further includes performing an etching process on the patterned hard mask feature to produce a reduced hard mask feature having a critical dimension that is less than the critical dimension of the patterned hard mask feature and performing an anisotropic etching process on the layer of gate electrode material using the reduced hard mask feature as a mask to define a gate electrode.
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