发明申请
US20070040100A1 Scanning imager employing multiple chips with staggered pixels
有权
扫描成像仪采用具有交错像素的多个芯片
- 专利标题: Scanning imager employing multiple chips with staggered pixels
- 专利标题(中): 扫描成像仪采用具有交错像素的多个芯片
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申请号: US11589357申请日: 2006-10-30
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公开(公告)号: US20070040100A1公开(公告)日: 2007-02-22
- 发明人: Jeffrey Zarnowski , Ketan Karia , Michael Joyner , Thomas Poonnen , Li Liu
- 申请人: Jeffrey Zarnowski , Ketan Karia , Michael Joyner , Thomas Poonnen , Li Liu
- 专利权人: Panavision Imaging, LLC.
- 当前专利权人: Panavision Imaging, LLC.
- 主分类号: H01L27/00
- IPC分类号: H01L27/00
摘要:
A solid state imaging system has at least one CMOS imager with first and second series of pixels in which the pixels of one series are offset, i.e., staggered, in respect to the pixels of the other series. Multiple imagers can be arrayed end to end, with jumper wires connecting the pixel output conductors or each so that the pixels feed into a common output amplifier for each series, to minimize chip to chip offset voltages. The pixels may be diagonally offset from one another, and a color imager can be constructed in which color ribbon filters are arranged diagonally across the imaging area. This arrangement minimizes color cross talk. An array of microlenses is situated with each microlens covering a plurality of the pixels. The different pixels under each microlens can be aligned along a diagonal. The different pixels under the same microlens can have different integration times, to increase the dynamic range of the imager(s).