发明申请
US20070053579A1 Outer surface-inspecting method, master patterns used therefor, and outer surface-inspecting apparatus equipped with such a master pattern 失效
外表面检查方法,使用的主图案和配备有这种主图案的外表面检查装置

  • 专利标题: Outer surface-inspecting method, master patterns used therefor, and outer surface-inspecting apparatus equipped with such a master pattern
  • 专利标题(中): 外表面检查方法,使用的主图案和配备有这种主图案的外表面检查装置
  • 申请号: US10556916
    申请日: 2004-05-17
  • 公开(公告)号: US20070053579A1
    公开(公告)日: 2007-03-08
  • 发明人: Shigeyuki AkimotoTakashi Itoh
  • 申请人: Shigeyuki AkimotoTakashi Itoh
  • 申请人地址: JP ITABASHI-KU 174-8580
  • 专利权人: KABUSHIKI KAISHA TOPCON
  • 当前专利权人: KABUSHIKI KAISHA TOPCON
  • 当前专利权人地址: JP ITABASHI-KU 174-8580
  • 优先权: JP2003-139344 20030516
  • 国际申请: PCT/JP04/06622 WO 20040517
  • 主分类号: G06K9/00
  • IPC分类号: G06K9/00
Outer surface-inspecting method, master patterns used therefor, and outer surface-inspecting apparatus equipped with such a master pattern
摘要:
The invention is to provide an outer surface-inspecting method, a master pattern and an outer surface-inspecting apparatus, which can eliminate severe positional alignment of the master pattern, avoid erroneous judgment taking acceptable products as unacceptable ones and suppress increase in number of standard pattern portions to be prepared as a master pattern. In the method and the apparatus, an outer surface of inspection areas 16a to 16i having repeated patterns are inspected through comparison with the predetermined master pattern. The inspection area is divided into a plurality of matrix-like view areas 16a to 16i. Mutually different standard pattern portions 17a to 17i are used depending upon different edge shapes of the divided inspection areas 16a to 16i contained in the inspection area, respectively. The present invention is suitable for inspecting the outer surface of a semiconductor chip such as a memory or a CCD (charge-coupled device).
信息查询
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