• Patent Title: Metal interconnection lines of semiconductor devices and methods of forming the same
  • Application No.: US11633697
    Application Date: 2006-12-04
  • Publication No.: US20070075429A1
    Publication Date: 2007-04-05
  • Inventor: Jae-Suk Lee
  • Applicant: Jae-Suk Lee
  • Priority: KR10-2003-0090328 20031211
  • Main IPC: H01L23/52
  • IPC: H01L23/52
Metal interconnection lines of semiconductor devices and methods of forming the same
Abstract:
Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal interconnection line includes: a semiconductor substrate; a metal pattern on the substrate; a glue pattern under the metal pattern; an anti-reflection pattern on the metal pattern; and dummy patterns surrounding side walls of the metal pattern.
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