发明申请
US20070082439A1 Semiconductor device having a dual stress liner, method of manufacturing the semiconductor device and light exposure apparatus for forming the dual stress liner
有权
具有双应力衬垫的半导体器件,半导体器件的制造方法和用于形成双重应力衬垫的曝光装置
- 专利标题: Semiconductor device having a dual stress liner, method of manufacturing the semiconductor device and light exposure apparatus for forming the dual stress liner
- 专利标题(中): 具有双应力衬垫的半导体器件,半导体器件的制造方法和用于形成双重应力衬垫的曝光装置
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申请号: US11246471申请日: 2005-10-07
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公开(公告)号: US20070082439A1公开(公告)日: 2007-04-12
- 发明人: Jae-Eon Park , Ja-Hum Ku , Jun-Jung Kim , Dae-Kwon Kang , Young Teh
- 申请人: Jae-Eon Park , Ja-Hum Ku , Jun-Jung Kim , Dae-Kwon Kang , Young Teh
- 专利权人: Samsung Electronics Co., Ltd.,Chartered Semiconductor Manufacturing Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.,Chartered Semiconductor Manufacturing Ltd.
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L29/788
摘要:
In a semiconductor device having a dual stress liner for improving electron mobility, the dual stress liner includes a first liner portion formed on a PMOSFET and a second liner portion formed on an NMOSFET. The first liner portion has a first compressive stress, and the second liner portion has a second compressive stress smaller than the first compressive stress. The dual stress liner may be formed by forming a stress liner on a semiconductor substrate on which the PMOSFET and the NMOSFET are formed and selectively exposing a portion of the stress liner on the NMOSFET.