发明申请
US20070083842A1 Standard cell library, method of designing semiconductor integrated circuit, semiconductor integrated circuit pattern, and semiconductor integrated circuit 有权
标准单元库,半导体集成电路设计方法,半导体集成电路图案和半导体集成电路

  • 专利标题: Standard cell library, method of designing semiconductor integrated circuit, semiconductor integrated circuit pattern, and semiconductor integrated circuit
  • 专利标题(中): 标准单元库,半导体集成电路设计方法,半导体集成电路图案和半导体集成电路
  • 申请号: US11543148
    申请日: 2006-10-05
  • 公开(公告)号: US20070083842A1
    公开(公告)日: 2007-04-12
  • 发明人: Yasunari NambaTakahiro Yamamoto
  • 申请人: Yasunari NambaTakahiro Yamamoto
  • 申请人地址: JP Chiba
  • 专利权人: KAWASAKI MICROELECTRONICS, INC.
  • 当前专利权人: KAWASAKI MICROELECTRONICS, INC.
  • 当前专利权人地址: JP Chiba
  • 优先权: JP2005-294646 20051007
  • 主分类号: G06F17/50
  • IPC分类号: G06F17/50
Standard cell library, method of designing semiconductor integrated circuit, semiconductor integrated circuit pattern, and semiconductor integrated circuit
摘要:
An exemplary cell library includes a first plurality of types of standard cells. Each of the first plurality of types of standard cells includes threshold voltage adjusting patterns. The upper and the lower boundaries of the threshold voltage adjusting patterns contact the upper and lower boundaries of the cell frame and the distances between the left and right boundaries of the-threshold voltage adjusting patterns and the cell frame are set appropriately. Accordingly, it is possible to place standard cells including transistors with different threshold voltages at arbitrary positions without increasing the area of a circuit block or the design cost.
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