发明申请
- 专利标题: Method for manufacturing semiconductor device
- 专利标题(中): 制造半导体器件的方法
-
申请号: US11581346申请日: 2006-10-17
-
公开(公告)号: US20070096204A1公开(公告)日: 2007-05-03
- 发明人: Shigeru Shiratake
- 申请人: Shigeru Shiratake
- 专利权人: ELPIDA MEMORY, INC.
- 当前专利权人: ELPIDA MEMORY, INC.
- 优先权: JP2005-313661 20051028
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/94
摘要:
A method for manufacturing a semiconductor device whereby the process is simplified and high performance can be obtained in both a trench-gate transistor and a planar transistor that has a thin gate insulating film when the two transistors are formed on the same semiconductor substrate. In a state in which the gate insulating film (11s) in a peripheral circuit region PE is covered by a protective film (12), a gate trench (18) is formed in a memory cell region M, after which a gate insulating film (19) that is thicker than the gate insulating film (11s) is formed on an inner wall of the gate trench (18) in a state in which the gate insulating film (11s) of the peripheral circuit region PE is still covered by the protective film (12).
公开/授权文献
- US07935595B2 Method for manufacturing semiconductor device 公开/授权日:2011-05-03
信息查询
IPC分类: