发明申请
US20070132073A1 DEVICE AND METHOD FOR ASSEMBLING A TOP AND BOTTOM EXPOSED PACKAGED SEMICONDUCTOR 审中-公开
用于组装顶部和底部暴露的包装半导体的装置和方法

DEVICE AND METHOD FOR ASSEMBLING A TOP AND BOTTOM EXPOSED PACKAGED SEMICONDUCTOR
摘要:
A packaged semiconductor device includes a two piece lead assembly having vertically separated top and bottom lead frames. A semiconductor die is between the two lead frames and makes electrical and thermal contact to the two lead frames. The lower lead frame is generally flat while the upper lead frame has a flat top surface and downward extensions that fall on two opposite sides of the lower lead frame and that end in flanges that have bottom surfaces that are coplanar with the bottom surface of the bottom lead frame. When the assembly is molded, the top surface of the top lead frame and the bottom surfaces of the flanges and the bottom lead frame are exposed to allow electrical contact to the semiconductor die and to provide thermal conductive paths to dissipate heat developed in the semiconductor die.
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