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发明申请
US20070166848A1 METHOD AND STRUCTURE TO PREVENT CIRCUIT NETWORK CHARGING DURING FABRICATION OF INTEGRATED CIRCUITS 失效
在整合电路制造过程中防止电路网络充电的方法和结构

  • 专利标题： METHOD AND STRUCTURE TO PREVENT CIRCUIT NETWORK CHARGING DURING FABRICATION OF INTEGRATED CIRCUITS
  • 专利标题（中）： 在整合电路制造过程中防止电路网络充电的方法和结构
  • 申请号： US11687711
    申请日： 2007-03-19
  • 公开(公告)号： US20070166848A1
    公开(公告)日： 2007-07-19
  • 发明人: Jeffrey Gambino , Kirk Peterson
  • 申请人： Jeffrey Gambino , Kirk Peterson
  • 主分类号： H01L21/00
  • IPC分类号： H01L21/00 ;  H01L21/82
METHOD AND STRUCTURE TO PREVENT CIRCUIT NETWORK CHARGING DURING FABRICATION OF INTEGRATED CIRCUITS
摘要：
An integrated circuit and method of fabricating the integrated circuit. The integrated circuit, including: one or more power distribution networks; one or more ground distribution networks; one or more data networks; and fuses temporarily and electrically connecting power, ground or data wires of the same or different networks together, the same or different networks selected from the group consisting of the one or more power distribution networks, the one or more ground distribution networks, the one or more data networks, and combinations thereof.
摘要（中）：

集成电路及其制造方法。 该集成电路包括：一个或多个配电网络; 一个或多个地面分配网络; 一个或多个数据网络; 并且将相同或不同网络的电力，地线或数据线临时并电连接在一起，从由一个或多个配电网络，一个或多个配电网络，一个或多个配电网络组成的组中选择的相同或不同的网络， 更多数据网络及其组合。

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