发明申请
- 专利标题: Echo Preventing Circuit and Digital Signal Processing Circuit
- 专利标题(中): 回波预防电路和数字信号处理电路
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申请号: US11627839申请日: 2007-01-26
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公开(公告)号: US20070176812A1公开(公告)日: 2007-08-02
- 发明人: Takeo Inoue , Hideki Ohashi
- 申请人: Takeo Inoue , Hideki Ohashi
- 申请人地址: JP Osaka
- 专利权人: Sanyo Electric Co, Ltd.
- 当前专利权人: Sanyo Electric Co, Ltd.
- 当前专利权人地址: JP Osaka
- 优先权: JP2006-025118 20060201
- 主分类号: H03M1/66
- IPC分类号: H03M1/66
摘要:
An echo preventing circuit comprises a filter that is inputted with a first digital signal and outputs a second and a third digital signals; a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal; a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal; an input/output terminal that outputs the first analog signal or that is inputted with a third analog signal; a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal; and an AD converter that converts the fourth analog signal into a fourth digital signal and outputs the fourth digital signal, wherein the filter sets filter coefficients for which the fourth analog signal is a signal formed by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal, based on the fourth digital signal outputted from the AD converter when signals are inputted into the first and the second DA converters while the third analog signal is not present, and wherein the fourth analog signal outputted from the subtracting circuit is outputted as an output signal corresponding to the third analog signal.
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