发明申请
US20070180195A1 Method and apparatus for allowing uninterrupted address translations while performing address translation cache invalidates and other cache operations
失效
允许不间断地址转换同时执行地址转换高速缓存无效和其它高速缓存操作的方法和装置
- 专利标题： Method and apparatus for allowing uninterrupted address translations while performing address translation cache invalidates and other cache operations
- 专利标题（中）： 允许不间断地址转换同时执行地址转换高速缓存无效和其它高速缓存操作的方法和装置
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申请号： US11344900申请日： 2006-02-01
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公开(公告)号： US20070180195A1公开(公告)日： 2007-08-02
- 发明人: Chad McBride , Andrew Wottreng , John Irish
- 申请人： Chad McBride , Andrew Wottreng , John Irish
- 申请人地址： US NY ARMONK
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY ARMONK
- 主分类号： G06F13/00
- IPC分类号： G06F13/00 ; G06F12/00
摘要：
A method and apparatus for allowing multiple devices access to an address translation cache while cache maintenance operations are occurring at the same time. By interleaving the commands requiring address translation with maintenance operations that may normally take many cycles, address translation requests may have faster access to the address translation cache than if maintenance operations were allowed to stall commands requiring address translations until the maintenance operation was completed.