发明申请
- 专利标题: Solder bump on a semiconductor substrate
- 专利标题(中): 半导体衬底上的焊点
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申请号: US11347378申请日: 2006-02-06
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公开(公告)号: US20070182007A1公开(公告)日: 2007-08-09
- 发明人: Shin-Puu Jeng , Hao-Yi Tsai , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai
- 申请人: Shin-Puu Jeng , Hao-Yi Tsai , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L23/52 ; H01L29/40
摘要:
A solder bump on a semiconductor substrate is provided. The solder bump comprises a semiconductor substrate having a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein the inorganic passivation layer has a thinner portion adjacent a top portion of the first opening. The solder bump further comprises a soft passivation layer on the inorganic passivation layer with a second opening larger than the first opening, an under bump metal layer conformally formed along the first opening and the second opening and a solder bump formed on the under bump metal layer.
公开/授权文献
- US07449785B2 Solder bump on a semiconductor substrate 公开/授权日:2008-11-11
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