Invention Application
- Patent Title: Structure and method for reducing the current consumption of a capacitive load
- Patent Title (中): 降低电容负载电流消耗的结构和方法
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Application No.: US11357068Application Date: 2006-02-21
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Publication No.: US20070194974A1Publication Date: 2007-08-23
- Inventor: Chun-Sheng Lin
- Applicant: Chun-Sheng Lin
- Assignee: Sitronix Technology Corp.
- Current Assignee: Sitronix Technology Corp.
- Main IPC: H03M1/12
- IPC: H03M1/12

Abstract:
The present invention discloses a structure and method for reducing the current consumption of a capacitive load, wherein a storage capacitor is installed between a capacitive load and the output side of a drive element; a switch is used to switch the connection between the storage capacitor and the capacitive load and the connection between the output side and the capacitive load; when the output side is to undertake a signal transition, the switch interconnects the storage capacitor and the capacitive load to equalize those two capacitors; after the equalization is completed, the switch interconnects the output side and the capacitive load to charge the capacitive load; thus, the load capacitor of the capacitive load can be charged or discharged at an initial voltage level.
Information query