发明申请
US20070196958A1 Method for using partitioned masks to build a chip 有权
使用分区掩码构建芯片的方法

Method for using partitioned masks to build a chip
摘要:
A mask reuse methodology process in which the soft logic is implemented with a generic array type cell structure mask and a custom blocking mask. A method is provided comprising printing a set of component cores onto a die at predetermined locations with a reusable mask set; providing a custom blocking mask that includes opaque regions that positionally correspond with the component cores on the die; superimposing the custom blocking mask with a generic array type cell mask to form superimposed masks; and using the superimposed masks to print generic array type cells onto the die with the exception of the predetermined locations where the set of component cores reside.
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