Invention Application
US20070202693A1 Method of and Apparatus for Forming Three-Dimensional Structures Integral With Semiconductor Based Circuitry 审中-公开
用于形成与半导体电路一体化的三维结构的方法和装置

  • Patent Title: Method of and Apparatus for Forming Three-Dimensional Structures Integral With Semiconductor Based Circuitry
  • Patent Title (中): 用于形成与半导体电路一体化的三维结构的方法和装置
  • Application No.: US11668299
    Application Date: 2007-01-29
  • Publication No.: US20070202693A1
    Publication Date: 2007-08-30
  • Inventor: Adam CohenGang Zhang
  • Applicant: Adam CohenGang Zhang
  • Main IPC: H01L21/44
  • IPC: H01L21/44 C23C28/00
Method of and Apparatus for Forming Three-Dimensional Structures Integral With Semiconductor Based Circuitry
Abstract:
Enhanced Electrochemical fabrication processes are provided that can form three-dimensional multi-layer structures using semiconductor based circuitry as a substrate. Electrically functional portions of the structure are formed from structural material (e.g. nickel) that adheres to contact pads of the circuit. Aluminum contact pads and silicon structures are protected from copper diffusion damage by application of appropriate barrier layers. In some embodiments, nickel is applied to the aluminum contact pads via solder bump formation techniques using electroless nickel plating. In other embodiments, selective electroless copper plating or direct metallization is used to plate sacrificial material directly onto dielectric passivation layers. In still other embodiments, structural material deposition locations are shielded, then sacrificial material is deposited, the shielding is removed, and then structural material is deposited. In still other embodiments structural material is made to attach to non-contact pad regions.
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