发明申请
US20070210649A1 DC-DC converter control circuit, DC-DC converter, power supply unit, and DC-DC converter control method 有权
DC-DC转换器控制电路,DC-DC转换器,电源单元和DC-DC转换器控制方法

  • 专利标题: DC-DC converter control circuit, DC-DC converter, power supply unit, and DC-DC converter control method
  • 专利标题(中): DC-DC转换器控制电路,DC-DC转换器,电源单元和DC-DC转换器控制方法
  • 申请号: US11526051
    申请日: 2006-09-25
  • 公开(公告)号: US20070210649A1
    公开(公告)日: 2007-09-13
  • 发明人: Hidekiyo OzawaMorihito Hasegawa
  • 申请人: Hidekiyo OzawaMorihito Hasegawa
  • 专利权人: FUJITSU LIMITED
  • 当前专利权人: FUJITSU LIMITED
  • 优先权: JP2006-058861 20060306
  • 主分类号: H02J1/00
  • IPC分类号: H02J1/00
DC-DC converter control circuit, DC-DC converter, power supply unit, and DC-DC converter control method
摘要:
An object of the present invention is to provide a DC-DC converter control circuit capable of maintaining, even when any one of a plural number of DC-DC converters enters the abnormal state due to the occurrence of a failure, a voltage relationship between the output voltage of the faulty DC-DC converter and the output voltage of another DC-DC converter. An error amplifier ERA1G has an inverting input, a first non-inverting input, and a second non-inverting input. A first divided voltage VV1 provided from a first voltage divider circuit VD1 is fed into the inverting input; a reference voltage e1G from ground is fed into the first non-inverting input; and a second divided voltage VV2 provided from a second voltage divider circuit VD2 is fed into the second non-inverting input. The error amplifier ERA1G amplifies the error between the lower of the two voltage inputs fed into the two non-inverting inputs (i.e. the lower of the reference voltage e1G and the second divided voltage VV2), and the first divided voltage VV1 fed into the inverting input. The output terminal of the error amplifier ERA1G is connected to the input terminal of a PWM unit P1G.
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