A system for sensor network applications comprising a microcontroller for handling irregular events, at least one hardware accelerator for handling regular events, an event processor for interrupt handling and power management in the system, and a system bus. The microcontroller, hardware accelerator, and event processor each are connected to the system bus. The event processor gates power to the microcontroller to provide power to the microcontroller only for processing related to irregular events requiring processing by the microcontroller. The event processor further may gate power to the hardware accelerator. The system may further include a message processor and a plurality of sensors.