发明申请
- 专利标题: Low-cost cache coherency for accelerators
- 专利标题(中): 加速器的低成本缓存一致性
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申请号: US11388013申请日: 2006-03-23
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公开(公告)号: US20070226424A1公开(公告)日: 2007-09-27
- 发明人: Scott Clark , Andrew Wottreng
- 申请人: Scott Clark , Andrew Wottreng
- 申请人地址: US NY ARMONK
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY ARMONK
- 主分类号: G06F13/28
- IPC分类号: G06F13/28
摘要:
Embodiments of the invention provide methods and systems for reducing the consumption of inter-node bandwidth by communications maintaining coherence between accelerators and CPUs. The CPUs and the accelerators may be clustered on separate nodes in a multiprocessing environment. Each node that contains a shared memory device may maintain a directory to track blocks of shared memory that may have been cached at other nodes. Therefore, commands and addresses may be transmitted to processors and accelerators at other nodes only if a memory location has been cached outside of a node. Additionally, because accelerators generally do not access the same data as CPUs, only initial read, write, and synchronization operations may be transmitted to other nodes. Intermediate accesses to data may be performed non-coherently. As a result, the inter-chip bandwidth consumed for maintaining coherence may be reduced.
公开/授权文献
- US07814279B2 Low-cost cache coherency for accelerators 公开/授权日:2010-10-12