发明申请
摘要:
A folding chip planar stack package is realized by employing folding chips. The folding chip planar stack package includes a substrate, first and second semiconductor chips attached to an upper surface of the substrate while being folded and spaced in parallel to each other, a bonding wire for electrically connecting the first and second semiconductor chips with the substrate, a sealing material for sealing the upper surface of the substrate including the first and second semiconductor chips and the bonding wire, and solder balls attached to a lower surface of the substrate.
公开/授权文献
- US07397115B2 Folding chip planar stack package 公开/授权日:2008-07-08