Invention Application
US20070230261A1 Nonvolatile semiconductor memory device and method for testing the same
审中-公开
非易失性半导体存储器件及其测试方法
- Patent Title: Nonvolatile semiconductor memory device and method for testing the same
- Patent Title (中): 非易失性半导体存储器件及其测试方法
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Application No.: US11396928Application Date: 2006-04-04
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Publication No.: US20070230261A1Publication Date: 2007-10-04
- Inventor: Juerg Haufe , Konrad Seidel
- Applicant: Juerg Haufe , Konrad Seidel
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C7/00 ; G11C29/00 ; G11C16/04

Abstract:
A nonvolatile semiconductor memory device includes transistor-based memory cells. Each memory cell has a first and a second source/drain region, a channel region separating the first and the second source/drain region, a storage layer and a control gate. The control gates of the memory cells are connected to word lines. The first and second source/drain regions are connected to bit lines respectively. Each memory cell may be programmed by injecting first charge carriers of a first polarity and may be erased by injecting second charge carriers having the opposite polarity into the storage layer respectively. By applying a high stress voltage between bit line and word line, weak insulator structures may break through such that they become detectable as short-circuits by a low voltage leakage test. By applying the stress voltage contemporaneously on both sides of the memory cells, an early overerase/overprogram, resulting from hot carrier injection, is avoided.
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