发明申请
US20070232006A1 METHOD FOR FORMING EMBEDDED STRAINED DRAIN/SOURCE REGIONS BASED ON A COMBINED SPACER AND CAVITY ETCH PROCESS 有权
基于组合间隔和孔蚀刻过程形成嵌入式应变排水/源区的方法

METHOD FOR FORMING EMBEDDED STRAINED DRAIN/SOURCE REGIONS BASED ON A COMBINED SPACER AND CAVITY ETCH PROCESS
摘要:
By patterning a spacer layer stack and etching a cavity in an in situ etch process, the process complexity, as well as the uniformity, during the formation of embedded strained semiconductor layers may be significantly enhanced. In an initial phase, the spacer layer stack may be patterned on the basis of an anisotropic etch step with a high degree of uniformity, since a selectivity between individual stack layers may not be necessary. Thereafter, a cleaning process may be performed followed by a cavity etch process, wherein a reduced over-etch time during the spacer patterning process significantly contributes to the uniformity of the finally obtained cavities, while the in situ nature of the process also provides a reduced overall process time.
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