发明申请
- 专利标题: Memory
- 专利标题(中): 记忆
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申请号: US11630851申请日: 2005-06-16
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公开(公告)号: US20070237016A1公开(公告)日: 2007-10-11
- 发明人: Hideaki Miyamoto , Naofumi Sakai , Kouichi Yamada , Shigeharu Matsushita
- 申请人: Hideaki Miyamoto , Naofumi Sakai , Kouichi Yamada , Shigeharu Matsushita
- 申请人地址: JP Osaka 570-8677
- 专利权人: SANYO ELECTRIC CO., LTD.
- 当前专利权人: SANYO ELECTRIC CO., LTD.
- 当前专利权人地址: JP Osaka 570-8677
- 优先权: JP2004-184498 20040623; JP2004-220505 20040728; JP2004-221038 20040729
- 国际申请: PCT/JP05/11031 WO 20050616
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
A memory wherein any “disturb effect” can be suppressed in which data in unselected memory cells are lost. This memory has a memory cell array(1) including bit lines, word lines, which are disposed to intersect the bit lines, and memory cells(12) each connected between bit and word lines. In this memory, an access operation, which includes at least one of read, rewrite and write operations, is made to a selected memory cell(12). During this access operation, it is performed to apply to the memory cell(12) a first voltage pulse, which provides an electrical field in a first direction so as to invert a stored data, and a second voltage pulse, which provides as electrical field in the opposite direction to the first one so as not to invert the stored data. In addition, a recovery operation for recovering a residual polarization amount is made to the memory cell(12).