Invention Application
- Patent Title: Shallow trench avoidance in integrated circuits
- Patent Title (中): 集成电路中的浅沟避免
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Application No.: US11394621Application Date: 2006-03-30
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Publication No.: US20070240082A1Publication Date: 2007-10-11
- Inventor: Jeffrey Davis , Rajashri Doddamani , Byungha Joo , Duc Nguyen , Darshana Surti , Eva Yim
- Applicant: Jeffrey Davis , Rajashri Doddamani , Byungha Joo , Duc Nguyen , Darshana Surti , Eva Yim
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
Diffusion regions in a standard cell design are bridged across cell boundaries. Shallow trench isolation is reduced and nitride passivation thickness variation is reduced.
Public/Granted literature
- US07475381B2 Shallow trench avoidance in integrated circuits Public/Granted day:2009-01-06
Information query
