发明申请
- 专利标题: DATA RECEIVER WITH CLOCK RECOVERY CIRCUIT
- 专利标题(中): 具有时钟恢复电路的数据接收器
-
申请号: US11742577申请日: 2007-04-30
-
公开(公告)号: US20070258552A1公开(公告)日: 2007-11-08
- 发明人: Martin Streibl , Peter Gregorius , Thomas Rickes , Ralf Schledz
- 申请人: Martin Streibl , Peter Gregorius , Thomas Rickes , Ralf Schledz
- 优先权: DE102006020107.8 20060429
- 主分类号: H04L7/00
- IPC分类号: H04L7/00
摘要:
A data receiver has a sampling unit connected to a data signal input and configured to sample a data signal amplitude and amplify the sampled data signal amplitude to a predetermined value, a sampling clock generator unit connected to the sampling unit and configured to predetermine a sampling clock for the sampling unit, an evaluation unit connected to the sampling unit and configured to determine the time duration required by the sampling unit for amplifying the sampled data signal amplitude to the predetermined value and evaluate the time duration determined, and a control unit connected to the evaluation unit and the sampling clock generator and configured to define the sampling clock on the basis of the evaluation of the time duration determined by the evaluation unit.
公开/授权文献
- US07864907B2 Data receiver with clock recovery circuit 公开/授权日:2011-01-04
信息查询